unisonic technologies co., ltd us203 preliminary cmos ic www.unisonic.com.tw 1 of 8 copyright ? 2011 unisonic technologies co., ltd qw-r502-435.d 80m , 0.6/1.5a high-side power switches with flag ? description the utc us203 are low voltage cost-effective high-side power switches with flag function. these devices are particularly suitable for self-powered and bus-powered usb applications. the build-in n-mosfet?s r ds(on) which meets the requirements of usb voltage drop is as low as 80m ? . the utc us203 contains a charge pump circuitry to drive the internal mosfet switch and also incorporate such protection circuits: soft-start circuit protect these devices from being damaged by limiting inrush current during plug-in; thermal shutdown circ uit is used to prevent catastrophic switch failure from high-current load s. uvlo is used to ensure that the device remains off unless there is a valid input voltage present. a flag output is designed to indicate fault conditions to the local usb controller. fault current is limited to typically 2.5a for utc us203ah/al in dual ports and 1a for utc us203ch/cl in single port in accordance with the usb power requirements, lower quiescent current as 25 a making this device ideal for portable battery-operated equipment. the utc us203 are applied in usb bus/self powered hubs, usb peripherals, nb, pcs, pc card hot swap, battery-powered equipment, hot-plug power supplies, battery-charger circuits , acpi power distribution. ? features * input voltage varies from 2.5v to 5.5v * built-in n-mosfet * output can be forced high er than input (off-state) * typical low supply current: - switch on: 25 a (typ) - switch off: 1 a (typ) * guaranteed continuous load curren t: 1.5a for us203ah/al and 0.6a for * us203ch/cl * open-drain fault flag output to indicate fault conditions * protection circuits: - soft-start( hot plug-in application) - uvlo 1.7v (typ.) - current limiting protection - thermal shutdown protection * reverse current flow blocking (no body diode) sot-25 1 3 5 2 4 sop-8 1 ? ordering information ordering number lead free halogen free package packing us203xxl-af5-r us203xxg-af5-r sot-25 tape reel US203XXL-S08-R us203xxg-s08-r sop-8 tape reel
us203 preliminary cmos ic unisonic technologies co., ltd 2 of 8 www.unisonic.com.tw qw-r502-435.d ? marking (for sot-25) ? pin configuration sot-25 sop-8 ? pin description pin no. sop-8 sot-25 pin name description 6,7,8 1 v out output voltage 1 2 gnd ground 3 nc 4 4 en enable. never let this pin floating. 2,3 5 v in power input voltage 5 flg open-drain fault flag output
us203 preliminary cmos ic unisonic technologies co., ltd 3 of 8 www.unisonic.com.tw qw-r502-435.d ? block diagram bias uvlo charge pump oscillator thermal protection gate control current limiting delay en v in v out flg gnd output voltage detection
us203 preliminary cmos ic unisonic technologies co., ltd 4 of 8 www.unisonic.com.tw qw-r502-435.d ? absolute maximum rating (t a = 25c, unless otherwise specified) parameter symbol ratings unit supply voltage v in 6.5 v enable input voltage v en -0.3 ~ +6.5 v flag voltage v flg 6.5 v power dissipation (t a = 25c) p d 0.4 w junction temperature t j 150 c storage temperature t stg -65~150 c notes: absolute maximum ratings are those values beyond which the device could be permanently damaged. absolute maximum ratings are stress ratings only and functional device oper ation is not implied. ? thermal data parameter symbol ratings unit sot-25 250 junction to ambient sop-8 ja 160 c/w ? recommended operating conditions parameter symbol ratings unit supply input voltage v in 2.5 ~ 5.5 v enable input voltage v i(en) 0 ~ 5.5 v junction temperature t j -40 ~ +125 c ambient operating temperature t opr -40 ~ +85 c ? electrical characteristics (v in = 5v, c in = c out = 1 f, t a = 25c, unless otherwise specified) parameter symbol test conditions min typ max unit sot-25 80 100 switch on resistance (us203ah,us203al) sop-8 i out = 1a, v in = 5v 90 110 m ? sot-25 80 100 switch on resistance (us203ch,us203cl) sop-8 r ds(on) i out = 0.5a, v in = 5v 90 110 m ? i sw_on switch on, r load open 25 45 supply current i sw_off switch off, r load open 0.1 1 a logic-low v il v in = 2.5v ~ 5.5v 0.8 v en threshold voltage logic-high v ih v in = 2.5v ~ 5.5v 2.0 v en input current i en v en/en = 0v ~ 5.5v 0.01 a output leakage current i o(leak) v en =0v, r load = 0 ? 0.5 10 a output turn-on rise time t on(rise) 10% to 90% of v out rising 400 s us203ax 1.6 2.5 3.2 a current limit us203cx i limit current ramp (< 0.1a/ms) on v out 0.7 1 1.4 a us203ax 1 a short circuit fold-back current us203cx i sc(fb) v out = 0v, measured prior to thermal shutdown 0.8 flag output resistance r flg i sink = 1ma 20 400 ? flag off current i flg_off v flg = 5v 0.01 1 a flag delay time t d from fault condition to flg assertion 5 12 20 ms shutdown pull-low resistance r ds v en =0v , v en 75 150 ? under-voltage lockout v uvlo v in increasing 1.3 1.7 v under-voltage hysteresis v uvlo v in decreasing 0.1 v thermal shutdown protection t sd 130 c thermal shutdown hysteresis t sd 20 c note: the device is not guaranteed to function outside its operating conditions.
us203 preliminary cmos ic unisonic technologies co., ltd 5 of 8 www.unisonic.com.tw qw-r502-435.d ? application information input and output v in (input) is the power source connection to the in ternal circuitry and the drain of the mosfet. v out (output) is the source of the mosfet. in a typical applica tion, current flows through the switch from v in to v out toward the load. because the mosfet is bi directional when on, if v out is greater than v in , current will flow from v out to v in there is no a parasitic body diode of n-mosfet between the drain and sour ce compared to a normal mosfet,. the us203 can protect damage from reverse current flow if v out being externally forced to a higher voltage than v in when the output disabled (v en > 2v). enable input the switch will be disabled when the en pin is in a logic low/high condition. during this condition, the internal circuitry and mosfet are turned off, re ducing the supply current to 0.1 a typical. floating the en may cause unpredictable operation. en should not be allowed to go negative with respect to gnd. the en pin may be directly tied to v in (gnd) to keep the part on. soft start for hot plug-in applications when hot-plug events occur, the soft start is used to el iminate the upstream volt age droop due to the inrush current. the soft-start protects power supplies from damage caused by highly capacitive loads. fault flag the fault flag is an open-drained output of an n-channel mosf et. the flag drops low to indicate fault conditions: current limit, thermal shutdown or v out < v in ? 1v. in order to reduce energy drain, a large pull-up resistor is required. 100k ? pull-up resistor is recommended for most applications. in the case of over current condition, the fault fl ag is active only if the flag response delay time (t d ) has elapsed. this ensures that flg is asserted only upon valid over-current conditions and that erroneous error reporting is eliminated. for example, false over-current conditions may occur during hot-plug events when extremely large capacitive loads are connected and causes a high transient inrush current that exceeds the current limit threshold. the flg response delay time t d is typically 10ms. under-voltage lockout uvlo (under-voltage lockout) turns off the mosfet swit ch once the input voltage falls below 1.3v, and the flg is in active. if the input voltage exceeds approximately 1.7v, the switch will be turned on. under-voltage detection functions only when the switch is enabled. current limiting and short-circuit protection the current limit circuit protects t he mosfet switch and the hub downstr eam port from damage. this circuit can deliver load current up to the current limit threshold of typically 2.5a through the switch of us203ah/al and 1a for us203ch/cl. when an enabled switch applies a heavy load or short circuit, a large-desired transient current occurs which can cause the current limit circuit response . if this current becomes higher than the current limit threshold, the devices enter constant current mode until thermal shutdown occurs or the fault is removed. thermal shutdown the thermal shutdown circuit is us ed to prevent damage occurs when the die temperature becomes higher than approximately 130c. after 20c of hyster esis, the switch will automatically rest art if it enabled. when these devices are disabled or the fault is re moved, the output and flg signal will continue to cycle on and off.
us203 preliminary cmos ic unisonic technologies co., ltd 6 of 8 www.unisonic.com.tw qw-r502-435.d ? application information(cont.) power dissipation the utc us203 ?s junction temperature varies depending the several factors such as the load, pcb layout, ambient temperature and package type. the output pin of utc us203 can deliver the current of up to 1.5a(us203ah/al), and 0.6a(us203ch/cl) over the full operating junction tem perature range. however, at higher ambient temperature the maximum output current must be derated to ensure the junction temperature does not exceed 100c. with all possible conditions, the junction temperature must be within the range specified under operating conditions. power dissipation is det ermined by the output current and the r ds(on) of switch, the relationship between them is as seen is the following: p d = r ds(on) x i out 2 although the devices are rated for 1.5a and 0.6a of out put current, but the applicat ion may limit the amount of output current based on the total power dissipation and the ambient temperature. the final operating junction temperature for any set of conditions is calculated as follows: p d (max) = ( t j (max) - t a ) / ja universal serial bus (usb) & power distribution the usb?s goal is to be enabled device from different vend ors to interoperate in an open architecture. the usb is characterized incorporating ease of use for the end user, a wide range of wo rkloads and applications, robustness, synergy with the pc industry, and low-cost implement ation. in addition, the ben efits of the usb contain self-identifying peripherals, dynamically attachable and re configurable peripherals, multiple connections (support for concurrent operation of many devices), support physical devices up to 127, and compatibility with pc plug-and-play architecture. each usb system has one usb host, and the usb connects usb devices with a usb host. usb devices can be classified either as hubs, which provide additional attach ment points to the usb, or as functions, which provide capabilities to the system (for exampl e, a digital joystick). then the hub devices are classified as either bus-power hubs or self-powered hubs. self-powered hub power for the internal functions and do wnstream ports does not come from the usb, although the usb interface may draw up to 100ma from its upstream connect, to allow the interface to function when the remainder of the hub is powered down. the hub must be able to supply up to 500ma on all of its external downstream ports. over-current prot ection devices such as fuses and ptc resistors (also called poly fuse or polyswitch) have slow trip times, high on-resistance, and la ck the necessary circuitry for usb-required fault reporting. a bus-powered hub draws all of the power to any internal functions and downstream ports from the usb connector power pins. the hub may draw current as high as 500ma from the upstream device. external ports in a bus-powered hub can supply up to 100ma per port, with a maximum of four external ports. in order to protect the hubs to operating on the f aults conditions, the faster trip time of the utc us203 power distribution can make it. for meeting voltage regulation and fault notification requirements, low on-resistance and internal fault-reporting circuitry are required. furthermore, because the devices are power switches, they pr ovide the designer of self-powered hubs flexibility to turn off power to output ports. the devices have controlle d rise and fall times to provide the needed inrush current limiting required for the bus-powered hub power switch compared to a normal mosfft. supply filter/bypass capacitor to prevent input voltage droop occurs during hot-plug condition, a 1uf low-esr ceramic capacitor located between v in and gnd is strongly desired. however, higher capac itor values will further reduce the voltage droop on the input. furthermore, without the bypass capacitor, an out put short may cause sufficient ringing on the input (from source lead inductance) to destroy the internal control circ uitry. the input transient?s value must be not higher than the absolute maximum supply voltage ( 6.5v) even for a short duration.
us203 preliminary cmos ic unisonic technologies co., ltd 7 of 8 www.unisonic.com.tw qw-r502-435.d ? application information(cont.) output filter capacitor to meet the requirement of the maximum droop (330mv) in the hub v bus , a 150 f low-esr electrolytic or tantalum located from v out and gnd is strongly desired. standard bypa ss methods should be used to minimize inductance and resistance between the bypass capacit or and the downstream connector to reduce emi and decouple voltage droop caused when down stream cables are hot-insertion tr ansients. for emi and esd protection consideration , ferrite beads in us203 with v bus , the ground line and the 0.1 f bypass capacitors at the power connector pins are needed. the bypass capacitor itself shoul d have a low dissipation factor to allow decoupling at higher frequencies. voltage drop a minimum port-output voltage in two lo cations on the bus is shown in the usb specification, in which, 4.75v out of a self- powered hub port and 4.40v ou t of a bus-powered hub port. as with the self-powered hub, all resistive voltage drops for the bus-powered hub must be acco unted for to guarantee voltage regulation. v out (min) for multiple ports (n ports ) ganged together through one switch (if using one switch per port, n ports is equal to 1) can be established by the following equation: v out (min) = 4.75v ? [ i i x ( 4 x r conn + 2 x r cable ) ] ? (0.1a x n ports x r switch ) ? v pcb where, r conn = resistance of connector contacts (two contacts per connector) r cable = resistance of upstream cabl e wires (one 5v and one gnd) r switch = resistance of power switch (80m ? typical for utc us203 ) v pcb = pcb voltage drop the usb specification defines the maximum resistance per contact (r conn ) of the usb connector to be 30m ? and the drop across the pcb and switch to be 100mv. this basically leaves two vari ables in the equation: the resistance of the switch and the resist ance of the cable. if the hub consumes the maximum current (i i ) of 500ma, the maximum resistance of the cable is 90m ? . the following equation determines the resistance of the switch: r switch = { 4.75v ? 4.4v ? [ 0.5a x ( 4 x 30m ? + 2 x 90m ? ) ] ? v pcb } ( 0.1a x n ports ) = (200mv ? v pcb ) ( 0.1a x n ports ) if the voltage drop across the pcb is limited to 100mv, the maximum re sistance for the switch is 250m ? for four ports ganged together. the utc us203 , with its maximum 100m ? on-resistance over temper ature, easily meets this requirement. pcb layout guide careful pcb layout should be taken into consideration for meeting the requirements of the voltage drop, droop, and emi. the following guidelines must be paid attention. ~ output capacitor and ferrite beads should be placed as close to the usb connectors as possible to lower impedance (mainly inductance) between the port and the capacitor and improve trans ient load performance. ~ the utc us203 should be placed as close as possible to the output port to limit switching noise. ~ ceramic bypass capacitors should be placed as close as possible to the vin pins of the utc us203 ~ keep all vbus traces as short as possible and use at least 50-mil, 2 ounce copper for all vbus traces. ~ avoid vias as much as possible. if vias are necessary, make them as large as feasible. ~ place a ground plane under all circuitry to lower both resistance and inductance and improve dc and transient performance (use a separate ground and power plans if possible). ~ place cuts in the ground plane between ports to help reduce the coupling of transients between ports.
us203 preliminary cmos ic unisonic technologies co., ltd 8 of 8 www.unisonic.com.tw qw-r502-435.d ? typical application circuit utc assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all utc products described or contained herein. utc products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. the information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice.
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